
malloc:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400540 <_init>:
  400540:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400544:	910003fd 	mov	x29, sp
  400548:	9400003c 	bl	400638 <call_weak_fn>
  40054c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400550:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400560 <.plt>:
  400560:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400564:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf6e8>
  400568:	f947fe11 	ldr	x17, [x16, #4088]
  40056c:	913fe210 	add	x16, x16, #0xff8
  400570:	d61f0220 	br	x17
  400574:	d503201f 	nop
  400578:	d503201f 	nop
  40057c:	d503201f 	nop

0000000000400580 <malloc@plt>:
  400580:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  400584:	f9400211 	ldr	x17, [x16]
  400588:	91000210 	add	x16, x16, #0x0
  40058c:	d61f0220 	br	x17

0000000000400590 <__libc_start_main@plt>:
  400590:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  400594:	f9400611 	ldr	x17, [x16, #8]
  400598:	91002210 	add	x16, x16, #0x8
  40059c:	d61f0220 	br	x17

00000000004005a0 <__gmon_start__@plt>:
  4005a0:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  4005a4:	f9400a11 	ldr	x17, [x16, #16]
  4005a8:	91004210 	add	x16, x16, #0x10
  4005ac:	d61f0220 	br	x17

00000000004005b0 <abort@plt>:
  4005b0:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  4005b4:	f9400e11 	ldr	x17, [x16, #24]
  4005b8:	91006210 	add	x16, x16, #0x18
  4005bc:	d61f0220 	br	x17

00000000004005c0 <free@plt>:
  4005c0:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  4005c4:	f9401211 	ldr	x17, [x16, #32]
  4005c8:	91008210 	add	x16, x16, #0x20
  4005cc:	d61f0220 	br	x17

00000000004005d0 <__isoc99_scanf@plt>:
  4005d0:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  4005d4:	f9401611 	ldr	x17, [x16, #40]
  4005d8:	9100a210 	add	x16, x16, #0x28
  4005dc:	d61f0220 	br	x17

00000000004005e0 <printf@plt>:
  4005e0:	b0000090 	adrp	x16, 411000 <malloc@GLIBC_2.17>
  4005e4:	f9401a11 	ldr	x17, [x16, #48]
  4005e8:	9100c210 	add	x16, x16, #0x30
  4005ec:	d61f0220 	br	x17

Disassembly of section .text:

00000000004005f0 <_start>:
  4005f0:	d280001d 	mov	x29, #0x0                   	// #0
  4005f4:	d280001e 	mov	x30, #0x0                   	// #0
  4005f8:	aa0003e5 	mov	x5, x0
  4005fc:	f94003e1 	ldr	x1, [sp]
  400600:	910023e2 	add	x2, sp, #0x8
  400604:	910003e6 	mov	x6, sp
  400608:	580000c0 	ldr	x0, 400620 <_start+0x30>
  40060c:	580000e3 	ldr	x3, 400628 <_start+0x38>
  400610:	58000104 	ldr	x4, 400630 <_start+0x40>
  400614:	97ffffdf 	bl	400590 <__libc_start_main@plt>
  400618:	97ffffe6 	bl	4005b0 <abort@plt>
  40061c:	00000000 	.inst	0x00000000 ; undefined
  400620:	00400840 	.word	0x00400840
  400624:	00000000 	.word	0x00000000
  400628:	00400858 	.word	0x00400858
  40062c:	00000000 	.word	0x00000000
  400630:	004008d8 	.word	0x004008d8
  400634:	00000000 	.word	0x00000000

0000000000400638 <call_weak_fn>:
  400638:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf6e8>
  40063c:	f947f000 	ldr	x0, [x0, #4064]
  400640:	b4000040 	cbz	x0, 400648 <call_weak_fn+0x10>
  400644:	17ffffd7 	b	4005a0 <__gmon_start__@plt>
  400648:	d65f03c0 	ret
  40064c:	00000000 	.inst	0x00000000 ; undefined

0000000000400650 <deregister_tm_clones>:
  400650:	b0000080 	adrp	x0, 411000 <malloc@GLIBC_2.17>
  400654:	91012000 	add	x0, x0, #0x48
  400658:	b0000081 	adrp	x1, 411000 <malloc@GLIBC_2.17>
  40065c:	91012021 	add	x1, x1, #0x48
  400660:	eb00003f 	cmp	x1, x0
  400664:	540000a0 	b.eq	400678 <deregister_tm_clones+0x28>  // b.none
  400668:	90000001 	adrp	x1, 400000 <_init-0x540>
  40066c:	f9447c21 	ldr	x1, [x1, #2296]
  400670:	b4000041 	cbz	x1, 400678 <deregister_tm_clones+0x28>
  400674:	d61f0020 	br	x1
  400678:	d65f03c0 	ret
  40067c:	d503201f 	nop

0000000000400680 <register_tm_clones>:
  400680:	b0000080 	adrp	x0, 411000 <malloc@GLIBC_2.17>
  400684:	91012000 	add	x0, x0, #0x48
  400688:	b0000081 	adrp	x1, 411000 <malloc@GLIBC_2.17>
  40068c:	91012021 	add	x1, x1, #0x48
  400690:	cb000021 	sub	x1, x1, x0
  400694:	9343fc21 	asr	x1, x1, #3
  400698:	8b41fc21 	add	x1, x1, x1, lsr #63
  40069c:	9341fc21 	asr	x1, x1, #1
  4006a0:	b40000a1 	cbz	x1, 4006b4 <register_tm_clones+0x34>
  4006a4:	90000002 	adrp	x2, 400000 <_init-0x540>
  4006a8:	f9448042 	ldr	x2, [x2, #2304]
  4006ac:	b4000042 	cbz	x2, 4006b4 <register_tm_clones+0x34>
  4006b0:	d61f0040 	br	x2
  4006b4:	d65f03c0 	ret

00000000004006b8 <__do_global_dtors_aux>:
  4006b8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4006bc:	910003fd 	mov	x29, sp
  4006c0:	f9000bf3 	str	x19, [sp, #16]
  4006c4:	b0000093 	adrp	x19, 411000 <malloc@GLIBC_2.17>
  4006c8:	39412260 	ldrb	w0, [x19, #72]
  4006cc:	35000080 	cbnz	w0, 4006dc <__do_global_dtors_aux+0x24>
  4006d0:	97ffffe0 	bl	400650 <deregister_tm_clones>
  4006d4:	52800020 	mov	w0, #0x1                   	// #1
  4006d8:	39012260 	strb	w0, [x19, #72]
  4006dc:	f9400bf3 	ldr	x19, [sp, #16]
  4006e0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4006e4:	d65f03c0 	ret

00000000004006e8 <frame_dummy>:
  4006e8:	17ffffe6 	b	400680 <register_tm_clones>

00000000004006ec <immobility>:
  4006ec:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4006f0:	910003fd 	mov	x29, sp
  4006f4:	910073a1 	add	x1, x29, #0x1c
  4006f8:	90000000 	adrp	x0, 400000 <_init-0x540>
  4006fc:	91242000 	add	x0, x0, #0x908
  400700:	97ffffb4 	bl	4005d0 <__isoc99_scanf@plt>
  400704:	b9401fa0 	ldr	w0, [x29, #28]
  400708:	93407c00 	sxtw	x0, w0
  40070c:	d37ef400 	lsl	x0, x0, #2
  400710:	97ffff9c 	bl	400580 <malloc@plt>
  400714:	f90013a0 	str	x0, [x29, #32]
  400718:	b9002fbf 	str	wzr, [x29, #44]
  40071c:	1400000b 	b	400748 <immobility+0x5c>
  400720:	b9802fa0 	ldrsw	x0, [x29, #44]
  400724:	d37ef400 	lsl	x0, x0, #2
  400728:	f94013a1 	ldr	x1, [x29, #32]
  40072c:	8b000020 	add	x0, x1, x0
  400730:	b9402fa1 	ldr	w1, [x29, #44]
  400734:	11000421 	add	w1, w1, #0x1
  400738:	b9000001 	str	w1, [x0]
  40073c:	b9402fa0 	ldr	w0, [x29, #44]
  400740:	11000400 	add	w0, w0, #0x1
  400744:	b9002fa0 	str	w0, [x29, #44]
  400748:	b9401fa0 	ldr	w0, [x29, #28]
  40074c:	b9402fa1 	ldr	w1, [x29, #44]
  400750:	6b00003f 	cmp	w1, w0
  400754:	54fffe6b 	b.lt	400720 <immobility+0x34>  // b.tstop
  400758:	b9002fbf 	str	wzr, [x29, #44]
  40075c:	1400000c 	b	40078c <immobility+0xa0>
  400760:	b9802fa0 	ldrsw	x0, [x29, #44]
  400764:	d37ef400 	lsl	x0, x0, #2
  400768:	f94013a1 	ldr	x1, [x29, #32]
  40076c:	8b000020 	add	x0, x1, x0
  400770:	b9400001 	ldr	w1, [x0]
  400774:	90000000 	adrp	x0, 400000 <_init-0x540>
  400778:	91244000 	add	x0, x0, #0x910
  40077c:	97ffff99 	bl	4005e0 <printf@plt>
  400780:	b9402fa0 	ldr	w0, [x29, #44]
  400784:	11000400 	add	w0, w0, #0x1
  400788:	b9002fa0 	str	w0, [x29, #44]
  40078c:	b9401fa0 	ldr	w0, [x29, #28]
  400790:	b9402fa1 	ldr	w1, [x29, #44]
  400794:	6b00003f 	cmp	w1, w0
  400798:	54fffe4b 	b.lt	400760 <immobility+0x74>  // b.tstop
  40079c:	f94013a0 	ldr	x0, [x29, #32]
  4007a0:	97ffff88 	bl	4005c0 <free@plt>
  4007a4:	52800000 	mov	w0, #0x0                   	// #0
  4007a8:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4007ac:	d65f03c0 	ret

00000000004007b0 <dynamic>:
  4007b0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4007b4:	910003fd 	mov	x29, sp
  4007b8:	b90017bf 	str	wzr, [x29, #20]
  4007bc:	1400000b 	b	4007e8 <dynamic+0x38>
  4007c0:	d2800080 	mov	x0, #0x4                   	// #4
  4007c4:	97ffff6f 	bl	400580 <malloc@plt>
  4007c8:	f9000fa0 	str	x0, [x29, #24]
  4007cc:	b94017a0 	ldr	w0, [x29, #20]
  4007d0:	11002c01 	add	w1, w0, #0xb
  4007d4:	f9400fa0 	ldr	x0, [x29, #24]
  4007d8:	b9000001 	str	w1, [x0]
  4007dc:	b94017a0 	ldr	w0, [x29, #20]
  4007e0:	11000400 	add	w0, w0, #0x1
  4007e4:	b90017a0 	str	w0, [x29, #20]
  4007e8:	b94017a0 	ldr	w0, [x29, #20]
  4007ec:	7100241f 	cmp	w0, #0x9
  4007f0:	54fffe8d 	b.le	4007c0 <dynamic+0x10>
  4007f4:	b90017bf 	str	wzr, [x29, #20]
  4007f8:	1400000c 	b	400828 <dynamic+0x78>
  4007fc:	b98017a0 	ldrsw	x0, [x29, #20]
  400800:	d37ef400 	lsl	x0, x0, #2
  400804:	f9400fa1 	ldr	x1, [x29, #24]
  400808:	8b000020 	add	x0, x1, x0
  40080c:	b9400001 	ldr	w1, [x0]
  400810:	90000000 	adrp	x0, 400000 <_init-0x540>
  400814:	91244000 	add	x0, x0, #0x910
  400818:	97ffff72 	bl	4005e0 <printf@plt>
  40081c:	b94017a0 	ldr	w0, [x29, #20]
  400820:	11000400 	add	w0, w0, #0x1
  400824:	b90017a0 	str	w0, [x29, #20]
  400828:	b94017a0 	ldr	w0, [x29, #20]
  40082c:	7100241f 	cmp	w0, #0x9
  400830:	54fffe6d 	b.le	4007fc <dynamic+0x4c>
  400834:	d503201f 	nop
  400838:	a8c27bfd 	ldp	x29, x30, [sp], #32
  40083c:	d65f03c0 	ret

0000000000400840 <main>:
  400840:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400844:	910003fd 	mov	x29, sp
  400848:	97ffffda 	bl	4007b0 <dynamic>
  40084c:	52800000 	mov	w0, #0x0                   	// #0
  400850:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400854:	d65f03c0 	ret

0000000000400858 <__libc_csu_init>:
  400858:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40085c:	910003fd 	mov	x29, sp
  400860:	a901d7f4 	stp	x20, x21, [sp, #24]
  400864:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf6e8>
  400868:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf6e8>
  40086c:	91374294 	add	x20, x20, #0xdd0
  400870:	913722b5 	add	x21, x21, #0xdc8
  400874:	a902dff6 	stp	x22, x23, [sp, #40]
  400878:	cb150294 	sub	x20, x20, x21
  40087c:	f9001ff8 	str	x24, [sp, #56]
  400880:	2a0003f6 	mov	w22, w0
  400884:	aa0103f7 	mov	x23, x1
  400888:	9343fe94 	asr	x20, x20, #3
  40088c:	aa0203f8 	mov	x24, x2
  400890:	97ffff2c 	bl	400540 <_init>
  400894:	b4000194 	cbz	x20, 4008c4 <__libc_csu_init+0x6c>
  400898:	f9000bb3 	str	x19, [x29, #16]
  40089c:	d2800013 	mov	x19, #0x0                   	// #0
  4008a0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4008a4:	aa1803e2 	mov	x2, x24
  4008a8:	aa1703e1 	mov	x1, x23
  4008ac:	2a1603e0 	mov	w0, w22
  4008b0:	91000673 	add	x19, x19, #0x1
  4008b4:	d63f0060 	blr	x3
  4008b8:	eb13029f 	cmp	x20, x19
  4008bc:	54ffff21 	b.ne	4008a0 <__libc_csu_init+0x48>  // b.any
  4008c0:	f9400bb3 	ldr	x19, [x29, #16]
  4008c4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  4008c8:	a942dff6 	ldp	x22, x23, [sp, #40]
  4008cc:	f9401ff8 	ldr	x24, [sp, #56]
  4008d0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4008d4:	d65f03c0 	ret

00000000004008d8 <__libc_csu_fini>:
  4008d8:	d65f03c0 	ret

Disassembly of section .fini:

00000000004008dc <_fini>:
  4008dc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4008e0:	910003fd 	mov	x29, sp
  4008e4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4008e8:	d65f03c0 	ret
